RISC-V

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schizoidman@lemmy.mlEnglish · 3 months ago

RISC-V NAS: BPI-F3 & OpenMediaVault

www.youtube.com

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RISC-V NAS: BPI-F3 & OpenMediaVault

www.youtube.com

schizoidman@lemmy.mlEnglish · 3 months ago

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ylai@lemmy.mlEnglish · 6 months ago

Alibaba's research arm promises server-class RISC-V processor due this year

www.theregister.com

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Alibaba's research arm promises server-class RISC-V processor due this year

www.theregister.com

ylai@lemmy.mlEnglish · 6 months ago

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ylai@lemmy.mlEnglish · 7 months ago

Leaked docs hint Google may use SiFive RISC-V cores in next-gen TPUs

www.theregister.com

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Leaked docs hint Google may use SiFive RISC-V cores in next-gen TPUs

www.theregister.com

ylai@lemmy.mlEnglish · 7 months ago

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gronjo45@lemm.ee · 7 months ago

RISC-V Options?

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RISC-V Options?

gronjo45@lemm.ee · 7 months ago

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ylai@lemmy.mlEnglish · 8 months ago

$99 RISC-V dev board adds Raspberry Pi, Clik board interfaces

www.eenewseurope.com

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$99 RISC-V dev board adds Raspberry Pi, Clik board interfaces

www.eenewseurope.com

ylai@lemmy.mlEnglish · 8 months ago

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schizoidman@lemmy.mlEnglish · 8 months ago

China bets on open-source chips as US export controls mount

www.reuters.com

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China bets on open-source chips as US export controls mount

www.reuters.com

schizoidman@lemmy.mlEnglish · 8 months ago

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camel-cdr@beehaw.org · 8 months ago

Vectorizing Unicode conversions on real RISC-V hardware

camel-cdr.github.io

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Vectorizing Unicode conversions on real RISC-V hardware

camel-cdr.github.io

camel-cdr@beehaw.org · 8 months ago

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ylai@lemmy.mlEnglish · 8 months ago

Edge AI chiplet uses SemiDynamics RISC-V cores

www.eenewseurope.com

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Edge AI chiplet uses SemiDynamics RISC-V cores

www.eenewseurope.com

ylai@lemmy.mlEnglish · 8 months ago

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ylai@lemmy.mlEnglish · 9 months ago

China Is All In on a RISC-V Future

www.hpcwire.com

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China Is All In on a RISC-V Future

www.hpcwire.com

ylai@lemmy.mlEnglish · 9 months ago

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ylai@lemmy.mlEnglish · 9 months ago

CEO interview: MIPS’ Sameer Wasson on a RISC-V reboot

www.eenewseurope.com

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CEO interview: MIPS’ Sameer Wasson on a RISC-V reboot

www.eenewseurope.com

ylai@lemmy.mlEnglish · 9 months ago

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ylai@lemmy.mlEnglish · 9 months ago

MIPS snags top SiFive brains to amp up RISC-V business – Drew Barbier and Brad Burgess join after restructure at former employer

www.theregister.com

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MIPS snags top SiFive brains to amp up RISC-V business – Drew Barbier and Brad Burgess join after restructure at former employer

www.theregister.com

ylai@lemmy.mlEnglish · 9 months ago

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JoeyJoeJoeJr@lemmy.ml · 10 months ago

First RISC-V mini laptops emerge

www.notebookcheck.net

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First RISC-V mini laptops emerge

www.notebookcheck.net

JoeyJoeJoeJr@lemmy.ml · 10 months ago

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testman@lemmy.mlM · 10 months ago

RISC V 101 - talks from RISC-V Summit

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RISC V 101 - talks from RISC-V Summit

testman@lemmy.mlM · 10 months ago

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Possibly linux@lemmy.zipEnglish · 10 months ago

This CPU is FREE! - Invidious

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This CPU is FREE! - Invidious

Possibly linux@lemmy.zipEnglish · 10 months ago

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testman@lemmy.mlM · 10 months ago

This CPU is FREE! - LTT video about Milk-V

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This CPU is FREE! - LTT video about Milk-V

testman@lemmy.mlM · 10 months ago

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ylai@lemmy.mlEnglish · 10 months ago

Meta Sees Little Risk in RISC-V Custom Accelerators

www.nextplatform.com

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Meta Sees Little Risk in RISC-V Custom Accelerators

www.nextplatform.com

ylai@lemmy.mlEnglish · 10 months ago

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ylai@lemmy.mlEnglish · 11 months ago

RISC-V Summit: Ghosts of x86 and ARM Linger

www.hpcwire.com

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RISC-V Summit: Ghosts of x86 and ARM Linger

www.hpcwire.com

ylai@lemmy.mlEnglish · 11 months ago

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testman@lemmy.mlM · 11 months ago

Why Nordic is getting involved in RISC-V

blog.nordicsemi.com

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Why Nordic is getting involved in RISC-V

blog.nordicsemi.com

testman@lemmy.mlM · 11 months ago

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schizoidman@lemmy.mlEnglish · 11 months ago

Ventana's 192-Core RISC-V CPU Takes Aim At AMD Epyc Genoa And Bergamo | Tom's Hardware

www.tomshardware.com

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Ventana's 192-Core RISC-V CPU Takes Aim At AMD Epyc Genoa And Bergamo | Tom's Hardware

www.tomshardware.com

schizoidman@lemmy.mlEnglish · 11 months ago

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ylai@lemmy.mlEnglish · 11 months ago

China Deploys Massive RISC-V Server in Commercial Cloud

www.hpcwire.com

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China Deploys Massive RISC-V Server in Commercial Cloud

www.hpcwire.com

ylai@lemmy.mlEnglish · 11 months ago

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RISC-V@lemmy.ml

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RISC-V (pronounced “risk-five”) is a license-free, modular, extensible instruction set architecture (ISA).

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