A quick one for you. I have received reports, now from multiple sources, that the major torch bearer of the RISC-V platform, a company known as SiFive and formed from the original architects of the RISC-V instruction set, has gone through some major changes.
Ian Cutress muses upon rumors around SiFive, the forerunner of high-performance RISC-V cores.
I was expecting this to go into the direction of “China has inserted itself as a state level actor into the development of RISC-V, don’t use it”. That would’ve been ridiculous as the US has been meddling with chips for a long time and we still use their stuff. Having chip designs or instruction set architecture out in the open would give me much more confidence in a chip that anything AMD, ARM, Nvidia, qualcomm or whatever out there release.
Of course open ISA doesn’t mean the resulting chip will be open, but it’s a step in the right direction.
I was expecting this to go into the direction of “China has inserted itself as a state level actor into the development of RISC-V, don’t use it”. That would’ve been ridiculous as the US has been meddling with chips for a long time and we still use their stuff. Having chip designs or instruction set architecture out in the open would give me much more confidence in a chip that anything AMD, ARM, Nvidia, qualcomm or whatever out there release.
Of course open ISA doesn’t mean the resulting chip will be open, but it’s a step in the right direction.
Indeed. We should also develop ways to detect sabotage in the design and manufacturing stages so a user can verify their chip doesn’t have a backdoor